This invention relates to a process for the fabrication of a semiconductor package and also to a semiconductor package.
As the level of integration of semiconductors becomes higher, the number of input/output terminals increases. A need has therefore arisen for a semiconductor package having many input/output terminals. In general, input/output terminals can be divided into two types, one being those arranged in a single row along a periphery of a package and the other being those arranged in multiple arrays not only along a periphery of a package but also inside the package. The former is typified by QFPs (Quad Flat Packages). To provide them with many terminals, it is necessary to reduce the pitch of the the terminals. In a pitch range of 0.5 mm and shorter, an advanced technique is required for their connection with a printed board. The latter array type permits arranging terminals at a relatively large pitch and is hence suited for a high pin count.
Among such array types, PGAs (Pin Grid Array) which are provided with connecting pins have heretofore been commonly used. However, their connections with printed boards are conducted by insertion, so that they are not suited for surface mounting. To overcome this inconvenience, packages called BGAs (Ball Grid Arrays) which permit surface mounting have been developed. These BGAs can be classified into (1) the ceramic type, (2) the printed wiring board type and (3) the tape type making use of TAB (tape automated bonding). Of these, the ceramic type has a shorter distance between a mother board and a package compared with the conventional PGAs so that a warp in the package due to a difference in thermal stress between the mother board and the package remains a serious problem. Further, the printed wiring board type is also accompanied by problems such as substrate warping, low moisture resistance, low reliability and large substrate thickness. Tape BGAs making use of the TAB technology have therefore been proposed.
With a view to meeting a further reduction in the package size, packages having substantially the same size as semiconductor chips, namely, so-called chip size packages (CSP) have been proposed. Each of them has connecting portions, which are to be connected with an external printed board, in a mounting area rather than at a peripheral portion of a semiconductor chip.
Specific examples of such CSPs include those fabricated by bonding a bumped polyimide film to a surface of a semiconductor chip, establishing electrical connection with the chip and gold lead wires, and potting an epoxy resin or the like to seal the resultant package (NIKKEI MATERIALS and TECHNOLOGY, No. 140, pp.18-19, April, 1994) and those obtained by forming metal bumps on a temporary substrate at positions corresponding to points of connection between a semiconductor chip and an external printed board, bonding the semiconductor chip facedown, and subjecting it to transfer molding on the temporary substrate (Smallest Flip-Chip-Like Package CSP; The Second VLSI Packaging Workshop of Japan, pp.46-50, 1994).
On the other hand, packages making use of a polyimide tape as a base film are studied in the fields of BGAs and CSPs as mentioned above. In this case, as the polyimide tape, one having a copper foil laminated on a polyimide film via an adhesive layer is commonly employed. However, from the viewpoint of heat resistance and moisture resistance, one having a polyimide layer formed directly on a copper foil, that is, a so-called two-layer flexible base material, is preferred. Production processes of such two-layer flexible base materials are roughly divided into (1) a process in which polyamic acid as a precursor for a polyimide is coated on a copper foil and is then hardened and (2) a process in which a thin metal film is formed on a hardened polyimide film by vacuum deposition or electroless plating. To provide, for example, holes reaching the copper foil by removing the polyimide at desired portions (which correspond to portions capable of exhibiting a second connecting function) while applying laser beam machining, it is preferred to make the polyimide film as thin as possible. In contrast, upon forming a two-layer flexible base material into the form of a leadframe and handling the same, a base film of a small thickness involves problems such as low handling readiness and insufficient rigidity as a frame.
As has been described above, various proposals have been made as semiconductor packages capable of meeting miniaturization and high integration. Nevertheless, further improvements are desired to provide satisfaction in all aspects such as performance, characteristics and productivity.
An object of the present invention is to provide a process for the fabrication of a semiconductor package, the process making it possible to stably fabricate with good productivity semiconductor packages capable of meeting miniaturization and high integration, and also to provide such a semiconductor package.
In a first aspect of the present invention, there is thus provided a process for the fabrication of a semiconductor package, which comprises the following steps:
1A) forming wiring on one side of a conductive temporary supporting member;
1B) mounting a semiconductor device on the conductive temporary supporting member on which the wiring has been formed, and then electrically connecting a terminal of the semiconductor device with the wiring;
1C) sealing the semiconductor device with resin;
1D) removing the conductive temporary supporting member to expose the wiring;
1E) forming an insulating layer over the exposed wiring at an area other than a position where an external connection terminal is to be formed; and
1F) forming the external connection terminal on the wiring at the positions where the insulating layer has not been formed.
In a second aspect of the present invention, there is also provided a process for the fabrication of a semiconductor package, which comprises the following steps:
2A) forming wiring on one side of a conductive temporary supporting member;
2B) forming an insulating supporting member over the one side of the conductive temporary supporting member, the one side carrying the wiring formed thereon;
2C) removing the conductive temporary supporting member and then transferring the wiring onto the insulating supporting member;
2D) removing the insulating supporting member at positions where an external connection terminal is to be formed for the wiring, whereby a through-holes is formed for the external connection terminal;
2E) mounting a semiconductor device on the insulating supporting member on which the wiring has been transferred, and then electrically connecting a terminal of the semiconductor device with the wiring;
2G) sealing the semiconductor device with resin; and
2H) forming, in the through-hole for the external connection terminal, the external connection terminal so that the external connection terminal is electrically connected to the wiring.
In the second aspect of the invention, it is preferable to proceed from 2A to 2H; here, step 2D can come before 2B. For example, step 2B can be conducted by bonding an insulating film insulating supporting member previously provided with an external connection terminal through-hole with one side of the conductive temporary supporting member, the one side carrying the wiring pattern formed thereon.
In a third aspect of the present invention, there is also provided a process for the fabrication of a semiconductor package, which comprises the following steps:
3A) forming wiring on one side of a conductive temporary supporting member;
3B) mounting a semiconductor device on the conductive temporary supporting member on which the wiring has been formed, and then electrically connecting a terminal of the semiconductor device with the wiring;
3C) sealing the semiconductor device with resin;
3D) removing the conductive temporary supporting member at an area other than positions where an external connection terminal for the wiring is to be formed, whereby the external connection terminal made from the conductive temporary supporting member is formed; and
3E) forming an insulating layer at the area other than the position of the external connection terminal.
In a fourth aspect of the present invention, there is also provided a process for the fabrication of a semiconductor package, which comprises the following steps:
4A) forming a wiring on one side of a conductive temporary supporting member;
4B) mounting a semiconductor device on the conductive temporary supporting member on which the wiring has been formed, and then electrically connecting a terminal of the semiconductor device with the wiring;
4C) sealing the semiconductor device with resin;
4D) forming a metal pattern, which is different in conditions for removal from the conductive temporary supporting member, on another side of the conductive temporary supporting member, the another side being opposite to the one side where the semiconductor device has been mounted, at a position where an external connection terminal for the wiring is to be formed; and
4E) removing the conductive temporary supporting member at an area other than the position where the metal pattern has been formed.
As a metal pattern, it is preferable to use solder. Further, gold layer on nickel layer can be used.
In a fifth aspect of the present invention, there is also provided a process for the fabrication of semiconductor packages, which comprises the following steps:
5A) forming plural sets of wiring on one side of an insulating supporting member;
5B) removing the insulating supporting member at positions where external connection terminals for the wiring are to be formed, whereby through-holes for the external connection terminals are provided;
5C) mounting semiconductor devices on the insulating supporting member on which the plural sets of wiring have been formed, and then electrically connecting terminals of the semiconductor devices with the wiring, respectively;
5D) sealing the semiconductor devices with resin;
5E) forming, in the through-holes for the external connection terminals, the external connection terminals so that the external connection terminals are electrically connected to the wiring; and
5F) separating the resultant assembly into individual semiconductor packages.
In the fifth aspect of the invention, it is preferable to proceed from 5A to 5F. However, 5A and 5B can be reversed. In other words, a plurality of sets of wiring can be formed on an insulating supporting member provided with through-holes for external connection terminals.
In a sixth aspect of the present invention, there is also provided a process for the fabrication of semiconductor packages, which comprises the following steps:
6A) forming plural sets of wiring on one side of a conductive temporary supporting member;
6B) cutting apart the conductive temporary supporting member so that the plural sets of wiring formed on the conductive temporary supporting member are divided to include a predetermined number of wiring per unit, and then fixing on a frame the separated conductive temporary supporting member with the wiring formed thereon;
6C) mounting semiconductor devices on the conductive temporary supporting members on which the wiring has been formed, and then electrically connecting terminals of the semiconductor devices with the wiring, respectively;
6D) sealing the semiconductor devices with resin;
6E) removing the conductive temporary supporting member to expose the wiring;
6F) forming an insulating layer over the exposed wiring at areas other than positions where external connection terminals are to be formed;
6G) forming the external connection terminals at the positions where the insulating layer for the wiring has not been formed; and
6H) separating the resultant assembly into individual semiconductor packages.
The predetermined number of wiring per unit in step 6B is preferred to be one. However, in order to improve productivity, it can be more than one.
In a seventh aspect of the present invention, there is also provided a process for the fabrication of semiconductor packages, which comprises the following steps:
7A) forming plural sets of wiring on one side of an insulating supporting member;
7B) removing the insulating supporting member at positions where external connection terminals for the wiring are to be formed, whereby through-holes for the external connection terminals are provided;
7C) cutting apart the insulating supporting member so that the plural sets of wiring formed on the insulating supporting member are divided to include a predetermined number of wiring per unit, and then fixing on a frame the separated insulating supporting member with the wiring formed thereon;
7D) mounting semiconductor devices on the insulating supporting members on which the wiring have been formed, and then electrically connecting terminals of the semiconductor devices with the wiring, respectively;
7E) sealing the semiconductor devices with resin;
7F) forming, in the through-holes for the external connection terminals, the external connection terminals so that the external connection terminals are electrically connected to the wiring; and
7G) separating the resultant assembly into individual semiconductor packages.
In the fabrication process, it is preferable to proceed from 7A to 7G. However, 7A and 7B can be reversed as in the fifth aspect of the invention.
In an eighth aspect of the present invention, there is also provided a process for the fabrication of a semiconductor package provided with a single layer of wiring, one side of the wiring having a first connecting function of being connected with a semiconductor device and an opposite side of the wiring having a second connecting function of being to be connected to external wiring, which comprises the following steps 8A, 8B, 8C and 8D:
8A) working a heat-resistant insulating base material having a metal foil, thereby forming the metal foil into plural sets of wiring patterns;
8B) forming a hole at a position for exhibiting the second connecting function which is to be formed in a subsequent step, so that the hole extends from a side of the insulating base material to the wiring patterns;
8C) bonding a frame base material, which makes an opening through a predetermined portion thereof, to desired position on a surface of the wiring patterns and a surface of the insulating base material, the latter surface being located adjacent the wiring patterns, respectively; and
8D) mounting the semiconductor device, electrically connecting a terminal of the semiconductor device with the wiring pattern, and then sealing the semiconductor device with resin.
In the eight aspect of the invention, it is preferable to proceed from 8A to 8D. However, 8A and 8B can be reversed. In other words, metal foil can be formed into wiring patterns after a hole is formed on the insulating base material to extend to the metal foil.
In a ninth aspect of the present invention, there is also provided a process for the fabrication of semiconductor packages provided with a single layer of a wiring, one side of the wiring having a first connecting function of being connected with a semiconductor device and an opposite side of the wiring having a second connecting function of being to be connected to external wiring, which comprises the following steps 9A, 9B, 9C and 9D:
9A) working a heat-resistant insulating base material having a metal foil, thereby forming the metal foil into plural sets of wiring patterns;
9B) forming a hole at a position for exhibiting the second connecting function which is to be formed in a subsequent step, so that the hole extends from a side of the insulating base material to the wiring patterns;
9C) bonding a second insulating base material, which makes an opening through a predetermined portion thereof, to a desired position on a surface of the wiring patterns and a surface of the insulating base material, the latter surface being located adjacent to the wiring patterns, respectively, whereby an insulating supporting member is formed;
9D) cutting apart the insulating supporting member so that the plural sets of wiring formed on the insulating supporting member are divided to include a predetermined number of wiring per unit, and then fixing on a frame the separated insulating supporting member with the wiring formed thereon; and
9E) mounting the semiconductor device, electrically connecting a terminal of the semiconductor device with the wiring, and then sealing the semiconductor device with resin.
In the ninth aspect of the invention, it is preferable to proceed from 9A to 9E. However, 9A and 9B can be reversed as in the eight aspect of the invention.
In a tenth aspect of the present invention, there is also provided a process for the fabrication of semiconductor packages, which comprises the following steps:
10A) forming plural sets of wiring on one side of a supporting member;
10B) mounting plural semiconductor devices on the supporting member on which the wiring have been formed, and then electrically connecting terminals of the semiconductor devices with the wiring;
10C) subjecting the plural sets of electrically-connected semiconductor device and wiring to gang sealing with resin;
10D) removing desired portions of the supporting member to expose predetermined portions of the wiring, and forming external connection terminals so that the external connection terminals are electrically connected to the exposed wiring; and
10E) separating the resultant assembly into individual semiconductor packages.
Metal foil can be used as the supporting member, and wiring patterns can be exposed by removing the supporting member after sealing with resin.
Further, the supporting member can be an insulating base material, and nonthrough-holes reaching the wiring patterns can be formed by removing a predetermined section of an insulating base material after sealing with resin.
In an eleventh aspect of the present invention, there is also provided a process for the fabrication of a semiconductor device packaging frame, the frame being provided with plural semiconductor-device-mounting portions, portions connecting the plural semiconductor-device-mounting portions, and a registration mark portion, which comprises the following steps:
(a) forming wiring for the semiconductor-device-mounting portions on a conductive temporary substrate,
(b) transferring the wiring onto a resin substrate, and
(c) etching off the conductive temporary substrate;
wherein upon etching off the conductive temporary substrate in step (c), the conductive temporary substrate partly remains to form some of the connecting portions.
In the present invention, usual semiconductor devices such as LSI chips or IC chips can be used as the semiconductor devices.
To electrically connect the terminal of the semiconductor device with the wiring, it is possible to use not only wire bonding but also usual means such as a bump or an anisotropic conductive film.
In the present invention, a warp-free and deformation-free semiconductor package can be fabricated by subjecting a hardened sealing resin to heat treatment after a semiconductor device is sealed with resin.
The heat treatment can be conducted preferably at a temperature in a range of the glass transition point of the hardened sealing resin xc2x120xc2x0 C., because the hardened resin exhibits strongest plastic properties in the range of the glass transition point of the hardened sealing resin xc2x120xc2x0 C., thereby facilitating elimination of residual strain. If the temperature of the heat treatment is lower than the glass transition point xe2x88x9220xc2x0 C., the hardened resin becomes a glassy elastic substance so that relaxation effects tend to be lessened. If the temperature is higher than the glass transition point +20xc2x0 C., the hardened resin turns to a rubbery elastic substance so that effect of strain elimination also tend to be reduced.
A warp or deformation in the semiconductor package can be more completely eliminated by cooling the semiconductor package to room temperature at a temperature-lowering rate of 5xc2x0 C./min or less after the semiconductor package is heat-treated at a temperature in the temperature of the glass transition point of the hardened sealing resin xc2x120xc2x0 C.
It is preferred to conduct the heat-treatment and/or cooling step while pressing upper and lower surfaces of the hardened sealing resin by rigid flat plates under forces that reduce a warp or deformation in the hardened sealing resin.
In the semiconductor package according to the present invention, the wiring, where it is a single-layer wiring, is designed so that one side of the wiring has a first connecting function for permitting connection with the semiconductor chip and an opposite side of the wiring has a second connecting function enabling connection to the external wiring.
For the external connection terminals which are to be connected to the external wiring, solder bumps, gold bumps or the like can preferably be used.
From the standpoint of high densification, it is preferred to arrange the external connection terminals on a side further inward than a position where terminals of the semiconductor device are electrically connected by wire bonding or the like (fan-in type). As is understood from the foregoing, it is preferred from the standpoint of high densification to arrange the external connection terminals in a grid-like pattern on a lower side on which the semiconductor device is mounted.